/*
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/* #define	DEBUG	*/

#include <common.h>
#include <autoboot.h>
#include <cli.h>
#include <console.h>
#include <version.h>
#include <asm/io.h>
#include <asm/arch/platform.h>
#include "../webserver/webserver.h"

DECLARE_GLOBAL_DATA_PTR;

/*
 * Board-specific Platform code can reimplement show_boot_progress () if needed
 */
__weak void show_boot_progress(int val) {}

static void run_preboot_environment_command(void)
{
#ifdef CONFIG_PREBOOT
	char *p;

	p = getenv("preboot");
	if (p != NULL) {
# ifdef CONFIG_AUTOBOOT_KEYED
		int prev = disable_ctrlc(1);	/* disable Control C checking */
# endif

		run_command_list(p, -1, 0);

# ifdef CONFIG_AUTOBOOT_KEYED
		disable_ctrlc(prev);	/* restore Control C checking */
# endif
	}
#endif /* CONFIG_PREBOOT */
}

/* We come here after U-Boot is initialised and ready to process commands */
void main_loop(void)
{
	const char *s;

	bootstage_mark_name(BOOTSTAGE_ID_MAIN_LOOP, "main_loop");

#ifdef CONFIG_VERSION_VARIABLE
	setenv("ver", version_string);  /* set version variable */
#endif /* CONFIG_VERSION_VARIABLE */

	cli_init();

	run_preboot_environment_command();

#if defined(CONFIG_UPDATE_TFTP)
	update_tftp(0UL, NULL, NULL);
#endif /* CONFIG_UPDATE_TFTP */

	writel(0x02, 0x120c0020); //fun GPIO2_0
	writel(0x02, 0x120c001c); //fun GPIO1_7
	//printf("iocfg_reg51 is %x\n", readl(0x120c0020));
	//printf("iocfg_reg50 is %x\n", readl(0x120c001c));
	
	writel((0x01|readl(0x120b2400)), 0x120b2400); //dir output
	writel((0x7f&readl(0x120b1400)), 0x120b1400); //dir input
	//printf("dir is %x\n", readl(0x120b2400));
	//printf("dir is %x\n", readl(0x120b1400));
	
	if(readl(0x120B1200)) 
	{
	    udelay(1000000);
	    writel(0x01 ,0x120B2004); //set bit
	}
	else 
	{
	    udelay(1000000);
	    writel(0x01 ,0x120B2004); //set bit
	    udelay(1000000);
	    writel(0x00 ,0x120B2004); //reset bit
	    
	    udelay(1000000);
	    writel(0x01 ,0x120B2004); //set bit
	    udelay(1000000);
	    writel(0x00 ,0x120B2004); //reset bit
	    
	    udelay(1000000);
	    writel(0x01 ,0x120B2004); //set bit
	    udelay(1000000);
	    writel(0x00 ,0x120B2004); //reset bit
	    
	    udelay(1000000);
	    writel(0x01 ,0x120B2004); //set bit
	    
	    webserverloop();
	}
	
	
	
	s = bootdelay_process();
	if (cli_process_fdt(&s))
		cli_secure_boot_cmd(s);

	autoboot_command(s);

	cli_loop();
	panic("No CLI available");
}
